Qus : 1
3 If we can generate a maximum of 4 Boolean functions using n Boolean variables, what will be minimum value of n?
NIMCET PREVIOUS YEAR QUESTION
1 65536 2 16 3 1 4 4 Go to Discussion
Solution Qus : 2
2 The Process when processor fetch or decode another instruction during the execution of current instruction is called
1 Super computing 2 Pipelining 3 Cloud Computing 4 Accumulators Go to Discussion
Solution Pipelining is the process of accumulating instruction from the processor through a pipeline. It allows storing and executing instructions in an orderly process. It is also known as pipeline processing. Pipelining is a technique where multiple instructions are overlapped during execution.
Qus : 3
4 Which of the following is used by ALU to store the intermediate results?
1 Stack 2 Heap 3 Registers 4 Accumulators Go to Discussion
Solution An accumulator is a type of register included in a CPU. It acts as a temporary storage location which holds an intermediate value in mathematical and logical calculations. Intermediate results of an operation are progressively written to the accumulator, overwriting the previous value. For example, in the operation "3 + 4 + 5," the accumulator would hold the value 3, then the value 7, then the value 12. The benefit of an accumulator is that it does not need to be explicitly referenced, which conserves data in the operation statement.
Qus : 4
4 One TeraByte(TB)=_________GB and One ExaByte(EB)=_______GB
1 2 10 G B , 2 16 G B 2 2 10 G B , 2 20 G B 3 2 10 G B , 2 24 G B 4 2 10 G B , 2 30 G B Go to Discussion
Solution Unit Shortened Capacity Bit b 1 or 0 (on or off) Byte B 8 bits Kilobyte KB 1024 bytes Megabyte MB 1024 kilobytes Gigabyte GB 1024 megabytes Terabyte TB 1024 gigabytes Petabyte PB 1024 terabytes Exabyte EB 1024 petabytes Zettabyte ZB 1024 exabytes Yottabyte YB 1024 zettabytes
Qus : 5
2 The Cache Memory is more effective because of
1 Memory localization 2 Locality of reference 3 Memory Size 4 None of the mentioned Go to Discussion
Solution Locality of reference refers to a phenomenon in which a computer program tends to access same set of memory locations for a particular time period. In other words, Locality of Reference refers to the tendency of the computer program to access instructions whose addresses are near one another.
Qus : 6
1 Which of the following is the fastest means of memory access for CPU?
1 Registers 2 Cache 3 Main Memory 4 Stack Go to Discussion
Solution Registers are a type of computer memory used to quickly accept, store, and transfer data and instructions that are being used immediately by the CPU. The registers used by the CPU are often termed as Processor registers.
Qus : 7
3 The number (2217)8 is equivalent to
1 (608)16 2 (028F)16 3 (048F)16 4 (2297)16 Go to Discussion
Solution (2217)
8 =(010010001111)
8 Pair of 4 Bits
1111= F
1000=8
0100=4
(010010001111)8 =(48F)16
Qus : 8
1 To fetch data from secondary memory which one of the following register is used
1 MAR 2 PC 3 IR 4 MBR Go to Discussion
Solution MAR register is used to access data and instructions from memory during the execution phase of instruction. MAR holds the memory location of data that needs to be accessed. When reading from memory, data addressed by MAR is fed into the MDR (memory data register) and then used by the CPU. When writing to memory, the CPU writes data from MDR to the memory location whose address is stored in MAR. MAR, which is found inside the CPU, goes either to the RAM (random-access memory) or cache.
Qus : 9
2 The binary multiplication 00*11 will give
1 11 2 00 3 01 4 10 Go to Discussion
Solution 0*3=0Qus : 10
4 Consider a computer system with speed of 106 instructions per second. A program P, having 2n2 steps is run on this system, where n is the input size. If n = 10000, what is the execution time for P?
1 1.2 seconds 2 20 seconds 3 100 seconds 4 200 seconds Go to Discussion
Solution Speed of computer = 10 6 per second For n = 10000 = 10 4
T i m e = No of tasks Speed of computer
T i m e = 2 n 2 10 6
= 2 × ( 10 4 ) 2 10 6
= 2 × 10 8 10 6
= 2 × 10 2
= 200 s e c
Qus : 11
1 To access the I/O devices the status flags is continuously checked in
1 Program controlled I/O 2 Memory mapped I/O 3 I/O Mapped 4 None of the above Go to Discussion
Solution Programmed I/O: In program-controlled I/O, the processor program controls the complete data transfer. So only when an I/O transfer instruction is executed, the transfer could take place. It is required to check that device is ready/not for the data transfer in most cases. Usually, the transfer is to & from a CPU register & peripheral. Here, CPU constantly monitors the peripheral. Here, until the I/O unit indicates that it is ready for transfer, the CPU wait & stays in a loop. It is time-consuming as it keeps the CPU busy needlessly.
Qus : 12
3 Which one of the following Boolean algebraic rule is correct?
1 A . A' = 1 2 A + AB = A + B 3 A + A'B = A + B 4 A (A + B) = B Go to Discussion
Solution A + A'B = (A + A') . (A + B)
= 1 . (A + B)
= A + B
Qus : 13
1 The representation of a floating point binary number +1001.11 in 8 bit fraction and 6 bit exponent format is
1 Fraction : 01001110Exponent : 000100
2 Fraction : 00001001Exponent : 000011
3 Fraction : 10010000Exponent : 110000
4 Fraction : 00100100Exponent : 011000
Go to Discussion
Solution Qus : 14
3 Which term is redundant in the expression AB + A'C + BC ?
1 BC 2 A'C 3 AB 4 None of these Go to Discussion
Solution Qus : 15
5 Let the memory access time is 10 miliseconds and cache hit ratio 15%. The effective memory access time is
1 2 miliseconds 2 1.5 miliseconds 3 1.85 microseconds 4 1.85 miliseconds Go to Discussion
Solution Qus : 16
3 Which of the following is the representation of decimal number (- 147) in 2's compliment notation on a 12-bit machine?
1 111101101100 2 110001001101 3 111101101101 4 000001101101 Go to Discussion
Solution Qus : 17
1 The first instruction of bootstrap loader program of an operating system is stored in
1 RAM 2 Hard Disk 3 BIOS 4 None of these Go to Discussion
Solution Qus : 18
4 Consider the equation (40)x = (132)y is some bases x and y. Then a possible set of value of x and y are
1 8, 12 2 12, 8 3 6 and 12 4 14 and 6 Go to Discussion
Solution ( 40 ) x = ( 132 ) y ⇒ 4 × x 1 + 0 × x 0 = 1 × y 2 + 3 × y 1 + 2 × y 0 ⇒ 4 x + 0 = y 2 + 3 y + 2 4 x = y 2 + 3 y + 2 Qus : 19
2 The smallest integer that can be represented by an 8 bit number in 2's complement form is
1 -256 2 -128 3 -127 4 -255 Go to Discussion
Solution Qus : 20
4 Which of the following in a functionally complete set of gates?
I. NAND II. NOR
1 I but not II 2 II but not I 3 Neither I nor II 4 Both I and II Go to Discussion
Solution Qus : 21
4 The total number binary function that can be defined using n Boolean variables is
1 2n-1 2 2n 3 2n+1 4 None of these Go to Discussion
Solution Qus : 22
1 Assume x' represents negation of x the Boolean function x'y' + xy + x'y is equivalent to?
1 x' + y 2 x + y 3 x+ y' 4 x' + y ' Go to Discussion
Solution Qus : 23
1 The memory unit which directly communicates with
the CPU is known as
1 Primary Memory 2 Secondary Memory 3 Shared Memory 4 Auxiliary Memory Go to Discussion
Solution Qus : 24
3 Dynamic RAM consumes……. Power and ……than Static RAM
1 More, Faster 2 More, Slower 3 Less, Slower 4 Less, Faster Go to Discussion
Solution Qus : 25
3 The binary equivalent of (234.125)10 ?
1 (11101010.101)2 2 (10101010.011)2 3 (11101010.001)2 4 (10101110.011)2 Go to Discussion
Solution Qus : 26
4 Determine the octal equivalent of (432267)10 ?
1 (432267)8 2 (346731)8 3 (2164432)8 4 None of the above Go to Discussion
Solution Qus : 27
4 One Exabyte is equal to …
1 108 bytes 2 1 Zetta Bytes divided (/) by one thousand 3 1 Peta Bytes multiplied (×) by one thousand 4 All of the above Go to Discussion
Solution Qus : 28
2 Consider the following circuit.
How many minimum numbers of two input NAND
gates are required to design the above circuit?
1 6 2 4 3 5 4 3 Go to Discussion
Solution Qus : 29
2 The time required for fetching and execution of one
simple machine instruction is known as
1 Delay time 2 CPU cycle 3 Real Time 4 Seek Time Go to Discussion
Solution Qus : 30
2 The equivalence of given expression x+x'y with Boolean theorem is….
1 x 2 x + y 3 x' 4 0 Go to Discussion
Solution x+x'y
=(x+x')(x+y)
=(x+y)
Qus : 31
3 The logic XOR operation of (4AC0)16 and (B53F)16
results
1 AACB 2 0000 3 FFFF 4 ABCD Go to Discussion
Solution Qus : 32
1
The maximum and minimum value represented in signed 16-bit 2s compliment representation are
1
-32768 and 32767
2
0 and 32767
3
0 and 65535
4
-16384 and 16383
Go to Discussion
Solution
Maximum & Minimum in 16-bit 2's Complement
Total Bits: 16
Format: 1 sign bit + 15 magnitude bits
Maximum (positive):
0111 1111 1111 1111(2)
=
+32,767
Minimum (negative):
1000 0000 0000 0000(2)
=
−32,768
✅ Final Answer:
Minimum = −32,768
Maximum = +32,767
Qus : 33
4
Which of the following is true about Von Neumann architecture?
1
It has separate memory for data and instructions
2
It has separate storage for input/output operations
3
It has a separate processing unit for data and instructions
4
It has a single memory unit for both data and instructions
Go to Discussion
Solution Qus : 34
1
Equivalent of the decimal number (25.375)10 in binary form
1 (11001.011)2 2 (11101.011)2
3 (11011.111)2
4 (11001.101)2
Go to Discussion
Solution
Decimal to Binary Conversion
? Given: Convert (25.375)10
to binary.
? Step-by-step:
✅ Final Binary Answer: (25.375)10 = (11001.011)2
Qus : 35
2
Consider the following minterm for F:F(P, Q, R, S) = Σ0, 2, 5, 7, 8, 10, 13, 15. The minterms 2, 7, 8, and 13 are don't care terms. The minimal sum of products form for F is
1 ¯ Q S + Q ¯ S 2 ¯ Q ¯ S + Q S 3 ¯ Q ¯ R ¯ S + ¯ Q R ¯ S + Q ¯ R S + Q R S 4 ¯ P ¯ Q ¯ S + ¯ P Q S + P Q S + P ¯ Q ¯ S Go to Discussion
Solution Qus : 36
3
Suppose we have a 10-bit computer that uses 10-bit int (2's complement representation). the number representation of - 35 is
1 0000100011 2 1100100011 3 1111011101 4 1111011111 Go to Discussion
Solution
10-bit 2's Complement Representation of –35
Format: 10-bit signed integer using 2's complement representation.
Step-by-Step:
First, convert 35 to 10-bit binary: 0000100011
Find 1's complement: 1111011100
Add 1 (to get 2's complement): 1111011101
✅ Final Answer:
1111011101
–35 in 10-bit 2's complement: 1111011101
Qus : 37
4
A wrong sentence related to FAT 32 and NTFS file systems is
1
Read and write speeds of NTFS are faster than that of FAT 32
2
FAT 32 has lower disk utilisation compared to NTFS
3
NTFS stands for New Technology File System
4
FAT 32 store individual files of size up to 32 GB
Go to Discussion
Solution Qus : 38
1
A bulb in the staircase has two switches, one switch is at the ground floor and the other one is at the first floor. The bulb can be turned ON and also can be turned OFF by any of the switches irrespective of the state of the other switch. The logic of the switching of the bulb resembles
1
XOR Gate
2
XNOR Gate
3
AND Gate
4
OR Gate
Go to Discussion
Solution
Staircase Bulb Switch Logic
Question:
A staircase bulb is controlled by two switches — one at each floor. Each switch can independently turn the bulb ON or OFF, regardless of the other switch's position. What logic gate does this resemble?
✅ Correct Answer:
Exclusive OR (XOR) Gate
Explanation:
In XOR logic, the output is ON (1) when inputs are different, and OFF (0) when inputs are the same. Similarly, the bulb glows when the switches are in different states and turns OFF when both are in the same state.
Logic Used: XOR Gate
Qus : 39
4
Suppose we have a 10-bit computer that uses 10-bit floating point computational unit (Float number uses IEEE floating-point arithmetic where a floating point number has 1 sign bit, 5 exponent bits, and 4 fraction bits). The representation for +∞ (plus infinity) is
1 0 11111 1111 2 1 11111 0000 3 0 00000 1111 4 0 11111 0000 Go to Discussion
Solution
10-bit Floating Point: +∞ Representation
Format: The 10-bit floating point is structured as follows:
1 bit for sign (S)
5 bits for exponent (E)
4 bits for fraction/mantissa (F)
IEEE Rule for +∞:
In IEEE floating-point format, +∞ is represented as:
Sign bit (S): 0
Exponent bits (E): all 1s → 11111
Fraction bits (F): all 0s → 0000
✅ Final 10-bit Representation: 0111110000
Qus : 40
1 Cosider the following Boolean Expression for F:
F ( P , Q , R , S ) = P Q + ¯ P Q R + ¯ P Q ¯ R S .
The minimum sum of products form of F is
1 P Q + Q R + Q S 2 P + Q + R + S 3 ¯ P + ¯ Q + ¯ R + ¯ S 4 ¯ P R + ¯ P ¯ R S + P Go to Discussion
Solution Qus : 41
2
What is the name of the storage device that compensates the difference in rates of flow of data from one device to another?
1
Concentrator
2
Buffer
3
Cache
4
Cache
Go to Discussion
Solution
Data Flow Management
Question:
What is the name of the storage device that compensates the difference in rates of flow of data from one device to another?
✅ Correct Answer:
Buffer
Explanation:
A Buffer is a temporary storage area that helps in matching the speed of data transfer between a fast and a slow device, ensuring smooth data flow without loss.
Final Answer: Buffer
Qus : 42
2
If a processor clock is rated as million cycles per second, then its clock perios is:
1 2.50 × 10 − 10 s e c 2 4.00 × 10 − 10 s e c 3 1.00 × 10 − 10 s e c 4 5.00 × 10 − 10 s e c Go to Discussion
Solution Qus : 43
4
A CPU generates 32-bit virtual addresses. The page size is 4 KB. The processor has a translation look-aside buffer (TLB) which can hold a total of 128 page table entries and is 4 -way set associative. The minimum size of the TLB tag is:
1 20 bits 2 11 bits 3 13 bits 4 15 bits Go to Discussion
Solution To determine the minimum size of the TLB tag, let's break down the problem step by step.
1. Understand the Virtual Address Structure
The CPU generates 32-bit virtual addresses.
The page size is 4 KB, which means the offset within a page is determined by the lower bits of the virtual address.
2. Calculate the Number of Offset Bits
Page size = 4 KB = 2 12 bytes.
The offset within a page is determined by the lower 12 bits of the virtual address.
3. Calculate the Number of Virtual Page Number (VPN) Bits
Total virtual address bits = 32.
Offset bits = 12.
VPN bits = Total bits - Offset bits = 32−12=20 bits.
4. Understand the TLB StructureThe TLB is 4-way set associative , meaning there are 4 entries per set.
The TLB can hold a total of 128 page table entries.
Number of sets = Total entries / Associativity = 128/4=32 sets.
5. Calculate the Number of Set Index Bits
Number of sets = 32 = 2 5 .
The set index is determined by the lower 5 bits of the VPN.
6. Calculate the Number of Tag Bits
VPN bits = 20.
Set index bits = 5.
Tag bits = VPN bits - Set index bits = 20−5=15 bits.
7. Final Answer
The minimum size of the TLB tag is 15 bits.
Qus : 44
3 The number of minterms in a n variable truth tableis
1 n 2 2 n − 1 2 3 2 n 4 2 n − 1 Go to Discussion
Solution Qus : 45
4 Let ⊕ and ⊙ denote the Exclusive - OR and Exclusive-NOR operations respectively. Which of the following is not correct?
1 ¯ P ⊕ ¯ Q = P ⊙ Q 2 ¯ P ⊕ Q = P ⊙ Q 3 ¯ P ⊕ ¯ Q = P ⊕ Q 4 ( P ⊕ ¯ P ) ⊕ Q = ( P ⊙ ¯ P ) ¯ Q Go to Discussion
Solution Qus : 46
3
Which of the following registers is used to keep track of address of the memory location where the next instruction is located?
1
Memory Data Register
2
Memory Address Register
3
Program Counter
4
Instruction counters
Go to Discussion
Solution
Register Responsible for Next Instruction
Question:
Which of the following registers is used to keep track of the address of the memory location where the next instruction is located?
✅ Correct Answer:
Program Counter (PC)
Explanation:
The Program Counter (PC) holds the address of the next instruction to be fetched from memory and executed by the CPU. After fetching the current instruction, it automatically updates to point to the next one.
Final Answer: Program Counter
Qus : 47
4
The time required for fetching and execution of one machine instruction is:
1
Seek time
2
Real time
3
Delay time
4
CPU cycle
Go to Discussion
Solution
Time for Fetch & Execute
Definition:
The time required to fetch and execute one machine instruction is called a
Machine Cycle / CPU Cycle .
Includes:
Instruction fetch
Instruction decode
Operand fetch (if any)
Execution
Result store (if any)
✅ Final Answer: Machine Cycle / CPU Cycle.
Qus : 48
1 Consider the circuit shown below and find minimum number of NAND gates required to design it.
1 4 2 6 3 3 4 5 Go to Discussion
Solution Qus : 49
1
How many 32K × 1 RAM chips are needed to provide a memory capacity of 256K bytes?
1 64 2 32 3 8 4 128 Go to Discussion
Solution
Quick Solution
Each RAM chip: 32K × 1 = 32K bits = 4 KB
Total required: 256 KB
Number of chips needed: 256 ÷ 4 = 64
✅ Final Answer: 64 chips
Qus : 50
4
What is a potential problem of 1’s complement representation of numbers?
1
Binary substructions are not possible
2
Binary additions are not possible
3
Multiplication of two numbers cannot be carried out
4
There are two different representations of zero
Go to Discussion
Solution Qus : 51
2
The reduced form of the Boolean function F=xyz+xyz^{\prime}^{}+x^{\prime}yz+xy^{\prime}z is
1 x + y z + x z 2 x y + y z + x z
3 x y + y z
4 x + y + z Go to Discussion
Solution Qus : 52
3 In IEEE single precision floating point representation, exponent is represented in ______
1 8 bit Sign-magnitude representation 2 8 bit 2's complement representation 3 Biased exponent representation with a bias value 127 4 Biased exponent representation with a bias value 128 Go to Discussion
Solution Qus : 53
2 With 4-bit 2's complement arithmetic, which of the following addition will result in overflow?
1 1111 + 1101 2 0110 + 0110 3 1101 + 0101 4 0101 + 1011 Go to Discussion
Solution Qus : 54
2 If the 2's complement representation of a number is (011010)2 , what is its equivalent hexadecimal representation?
1 (110)16 2 (1A)16 3 (16)16 4 (26)16 Go to Discussion
Solution Qus : 55
4 For the circuit shown below, the complement of the output F is _________
1 0 2 X 3 X' 4 1 Go to Discussion
Solution Qus : 56
1 If N is a 16-bit signed integer, then 2's complement representation of N is (F87B)16 . The 2's complement representation of 8*N is
1 (C3D8)16 2 (187B)16 3 (F878)16 4 (987B)16 Go to Discussion
Solution Qus : 57
3 The base ( or radix) of the number system such that the following equation holds 312/20 = 131.1 is
1 3 2 4 3 5 4 6 Go to Discussion
Solution Qus : 58
2 Which of the following represents (D4)16 ?
1 (4E)16 - (5B)16 2 (14E)16 - (7A)16 3 (15C)16 - (6D)16 4 (1E4)16 - (A7)16 Go to Discussion
Solution Qus : 59
4 How many Boolean expressions can be be formed with 3 Boolean variables?
1 16 2 1024 3 32 4 256 Go to Discussion
Solution Qus : 60
1 In an 8 bit representation of computer system the decimal number 47 has to be subtracted from 38 and the result in binary 2's complement is _________
1 11110111 2 10001001 3 11111001 4 11110001 Go to Discussion
Solution Qus : 61
4 The maximum and minimum value represented in signed
16 bit 2's complement representations are
1 -16384 and 16383 2 0 and 32767 3 0 and 65535 4 -32768 and 32767 Go to Discussion
Solution Range of 2's complement
− 2 n − 1 to
2 n − 1 + 1
Range for 16 bits = − 2 16 − 1 to 2 16 − 1 + 1
Range for 16 bits = − 2 15 to 2 25 + 1
Range for 16 bits = − 32768 to 32767
Qus : 62
3 The minimum number of NAND gates required for implementing the Boolean expression A B + A ¯ B C + A ¯ B ¯ C
1 1 2 0 3 2 4 3 Go to Discussion
Solution A B + A ¯ B C + A ¯ B ¯ C =A B + A B ′ C + A B ′ C ′
=A B + A B ′ ( C + C ′ )
=A B + A B ′
=A ( B + B ′ )
=A
Qus : 63
1 Which of the following is equivalent to the Boolean expression:
( X + Y ) . ( X + ¯ Y ) . ( ¯ X + Y )
1 X Y 2 X ¯ Y 3 ¯ X Y 4 ¯ X ¯ Y Go to Discussion
Solution ( X + Y ) . ( X + ¯ Y ) . ( ¯ X + Y )
=( X + Y ) ( X + Y ′ ) ( X ′ + Y )
=( X X + X Y + Y X + Y Y ′ ) ( X ′ + Y )
=( X + X Y ) ( X ′ + Y )
=X ( 1 + Y ) ( X ′ + Y )
=X ( X ′ + Y )
=X X ′ + X Y
=X Y
Qus : 64
4 Suppose the largest n bit number requires ‘d’ digits in decimal representation. Which of the following relations between ‘n’ and ‘d’ is approximately correct
1 d = 2 n 2 n = 2 d 3 d < n log 10 2 4 d > n log 10 2 Go to Discussion
Solution n bits binary number required d -decimal digits.
So, 10 d > 2 n
Take on both side
log 10 ( 10 d ) > log 10 ( 2 n )
d > n log 10 ( 2 )
Qus : 65
2 If a processor clock is rated as 2500 million cycles per second, then its clock period is:
1 2.50 × 10 − 10 s e c 2 4.0 × 10 − 10 s e c 3 1.00 × 10 − 10 s e c 4 None of the above Go to Discussion
Solution we know that Frequency is defined as the number of cycles in one second
Number of cycle in 1 sec = 2500 million
=> Frequency = 2500 Mhz
we know that time period is the inverse of frequency and is defined as the time taken by one cycle.
T = 1 F
T = 1 2500 × 10 − 6
T = 4 × 10 − 10 sec
Qus : 66
4 Write the simplified form of the Boolean expression
(A+C)(AD+AD')+AC+C
1 A+C' 2 A'+C 3 A+D 4 A+C Go to Discussion
Solution (A+C)(AD+AD')+AC+C
=(A+C)A(D+D')+C(A+1)
=(A+C)+C
=A+C
Qus : 67
2 FFFF will be the last memory location in a memory of size
1 1k 2 64k 3 32k 4 16k Go to Discussion
Solution The Hexadecimal digits are 0-9 and A-F. The Hexadecimal system represents numbers in16 symbols, zero to nine and ten to fifteen is represented by the English alphabet A-F.
The Hexadecimal character represents 4 bits.
The last memory location in a memory of size 64K is FFFF.
64K is 2 16 bytes, i.e.
16 4 bytes = 1000 bytes in hexadecimal code.
The last accessible address is 1000-1 = FFFF.
Qus : 68
3 ‘Floating point representation' is used to represent
1 Integers 2 Whole Numbers 3 Real Numbers 4 Boolean Values Go to Discussion
Solution Qus : 69
2 The Boolean expression AB+ AB' + A'C + AC is unaffected by the value of the Boolean variable
1 A 2 B 3 C 4 None of these Go to Discussion
Solution A ( B + ¯ B ) + C ( A + ¯ A ) A + C Qus : 70
4 If a signal passing through a gate is inhibited by sending a low into one of the inputs, and the output is HIGH, the gate is a(n):
1 NOR 2 AND 3 OR 4 NAND Go to Discussion
Solution Output is high if any of the input is low. The truth table for NAND gate is:
A B Output 0 0 0 0 1 1 1 0 1 1 1 1
Table representing NAND Gate.
Qus : 71
4 The 2's complement representation of the number (–100)10 in an 8 bit computer is
1 10011011 2 01100100 3 11100100 4 10011100 Go to Discussion
Solution Qus : 72
1 The number of terms in the product of sums canonical form of
is
1 7 2 8 3 9 4 10 Go to Discussion
Solution Qus : 74
1 Consider a hard disk with 16 recording surfaces (0 – 15) having 16384 cylinders (0 – 16383) and each cylinder contains 64 sectors (0 – 63). Data storage capacity in each sector is 512 bytes. Data are organized stored in the disk and the starting disk location of the file is < 1200, 9, 40>. What is the cylinder number of the last sector of the file, if it is stored in a contiguous manner?
1 1284 2 1282 3 1286 4 1288 Go to Discussion
Solution Qus : 75
2 Consider the following min term expression for F.
F(P,Q,R,S) = ∑ (0, 2, 5, 7, 8, 10, 13, 15)
The minterms 2, 7, 8 and 13 are ‘do not care' terms.
The minimal sum of products form for F is
1 2 3 4 Go to Discussion
Solution Qus : 76
3 Consider the equation (43)x = (y3)8 where x and y are unknown. The number of possible solutions is
1 4 2 6 3 5 4 7 Go to Discussion
Solution Qus : 77
4 Subtract (1010)2 from (1101)2 using first complement
1 (1100)2 2 (0101)2 3 (1001)2 4 (0011)2 Go to Discussion
Solution Qus : 78
1 A hard disk has a rotational speed of 6000 rpm. Its average latency time is
1 5 × 10–3 sec 2 0.05 sec 3 1 sec 4 0.5 sec Go to Discussion
Solution Qus : 79
3 The Boolean expression represented by the following Venn diagram is
1 a XOR b 2 a'b + ab' 3 ab + a'b' 4 (a + b' )(a'+b) Go to Discussion
Solution Qus : 80
2 The range of n-bit signed magnitude representation is
1 0 to 2n - 1 2 - (2n-1 - 1 ) to (2n-1 - 1) 3 - (2n - 1 ) to (2n - 1) 4 0 to 2n-1 - 1 Go to Discussion
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